1. Field of the Invention
The present invention relates to testing of semiconductor wafers or samples and, more particularly, to accurately determining one or more properties of a semiconductor wafer or a semiconductor sample.
2. Description of Related Art
Heretofore, determination of a maximum capacitance, a.k.a. oxide capacitance (Cox), and flatband voltage (Vfb) of a semiconductor wafer or sample under test was accomplished utilizing a guided heuristic technique. Specifically, an operator determines a flatband capacitance Cfb of the semiconductor wafer or sample under test from a CV curve obtained or derived from the response of the semiconductor wafer or sample to a CV-type electrical stimulus applied by the operator to the semiconductor wafer or sample under test. An exemplary CV-type electrical stimulus includes sweeping a DC voltage, having an AC voltage superimposed thereon, from a starting voltage to an ending voltage. During the sweep of the DC voltage, plural samples of the DC voltage and the corresponding capacitance, i.e., voltage-capacitance data points, are acquired. The CV curve is derived or defined from these data points.
Utilizing the CV curve, the operator determines the flatband voltage Vfb corresponding to the flatband capacitance Cfb obtained from the CV curve. The operator then combines Vfb with an empirically determined overdrive voltage (Voverdrive). For a p-type wafer Voverdrive is subtracted from Vfb. For an n-type wafer Voverdrive is added to Vfb.
If the combination of Vfb and Voverdrive equals the starting voltage of the CV-type electrical stimulus, the estimated value of Vfb and the capacitance value on the CV curve corresponding to said starting voltage are deemed to be the actual values of Vfb and Cox for the semiconductor wafer or sample under test. However, if the combination does not equal said starting voltage, the operator obtains or derives a new CV curve from a new CV-type electrical stimulus applied by the operator to the semiconductor wafer or sample under test. For this new CV-type electrical stimulus, however, the operator utilizes a different starting voltage. The operator then utilizes this new CV curve in the manner described above to determine if the combination of the new value of Vfb and Voverdrive equals the starting voltage of the new CV-type electrical stimulus. If not, the foregoing process of obtaining or deriving a new CV curve based on the response of the semiconductor wafer or sample under test to a new CV-type electrical stimulus, determining values of flatband capacitance Cfb and flatband voltage Vfb from the new CV curve and determining if the combination of Vfb and Voverdrive equals the starting voltage of the CV curve is repeated until said combination for a particular CV curve equals the starting voltage of the corresponding CV-type electrical stimulus whereupon the estimated value of Vfb and the capacitance value corresponding to said starting voltage are deemed to be the actual values of Vfb and Cox for the semiconductor wafer or sample under test.
Once the values of Vfb and Cox for the semiconductor wafer or sample under test have been determined, values of capacitive equivalent thickness (CET), equivalent oxide thickness (EOT) and other properties of the semiconductor wafer or sample under test can be determined.
It has been observed that an experienced operator can use the results in one iteration of the foregoing heuristic technique to guide the choice of the starting voltage for the next application of a CV-type electrical stimulus to the semiconductor wafer or sample under test. Notwithstanding, the prior art heuristic technique for determining values of Vfb and Cox of a semiconductor wafer or sample under test typically requires the use of a plurality of CV curves each obtained or derived from a unique CV-type electrical stimulus having a different starting voltage.
What is needed, however, and is not heretofore known, is a method and apparatus for determining the values of Cfb and Vfb of a semiconductor wafer or sample under test, wherefrom other properties of the semiconductor wafer or sample under test can be determined, more quickly than the prior art heuristic technique, with minimal operator intervention and with minimal application of CV-type electrical stimulus to the semiconductor wafer or sample under test.